Download or read book Hardware Implementation of Reed Solomon Error Correction Encoder/decoder written by Smritha Venkatadri and published by . This book was released on 2003 with total page 220 pages. Available in PDF, EPUB and Kindle. Book excerpt: In this thesis work, the error correction scheme of Reed Solomon (RS), used in the form of an algorithm digital data communication application is considered. The hardware implementation of (15,9) Reed Solomon (RS) error correction in terms of encoder-decoder is developed. Also, RS encoding and RS decoding without erasing code symbols is emphasized. The work presents the simple concepts of groups and fields, specifically Galois Fields to explain the algorithm. Prior to presenting RS codes, other block codes are discussed as an introduction to coding. The (15,9) RS coding is then explained. Various methods and concepts of encoding and decoding are presented for the (15,9) RS coding. The hardware realization for the encoder and decoder is outlined including the detailed analytics, which form the basis for the layout. The hardware design is implemented using VHSIC Hardware Descriptive Language (VHDL) which facilitates the design process from the algorithmic form to the final chip level design. The ultimate objective of this thesis work is to provide an efficient hardware for sending message bits across the channel and also detecting and correcting multiple errors that occur during the transmission.